-------------------------------------------------------------------------------
-- Title      : rom 16 octets
-- Project    : 
-------------------------------------------------------------------------------
-- File       : rom_16x8.vhd
-- Author     :   <nouel@AINHOA>
-- Company    : 
-- Last update: 2006/05/16
-- Platform   : 
-------------------------------------------------------------------------------
-- Description: rom synthétisable mais implantee sous forme de LUT par xst
-------------------------------------------------------------------------------
-- Revisions  :
-- Date        Version  Author  Description
-- 2006/05/15  1.0      nouel	Created
-------------------------------------------------------------------------------

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;

ENTITY rom16x8 IS
  
  PORT (
    adresse : IN  std_logic_vector(3 DOWNTO 0);
    donnees : OUT std_logic_vector(7 DOWNTO 0));
END rom16x8;


ARCHITECTURE par_constante OF rom16x8 IS

  TYPE tableau IS ARRAY (0 TO 15) OF std_logic_vector(7 DOWNTO 0);

  CONSTANT rom : tableau :=
    (X"45", X"4E", X"53", X"45",  X"49",X"52", X"42", X"20",
 --   E      N      S     E       I      R     B
     X"42", X"6F", X"6E", X"6A", X"6F", X"75", X"72", X"00");
  -- B      o      n       j      o      u     r   
  
  SIGNAL adr : natural;
  
BEGIN  -- par_table
  
  adr <= to_integer(unsigned(adresse));
  
  donnees <= rom(adr);
 
 
END par_constante;